Hi Steve and Sasha,

  3 PS files attached are the resultant plots of last 4.5 days run.
Steve, could you put them on the web?

  First two are same kind of plots as I made in last run.
YAlO outputs are still instable.  There is a 4% jump in LED plots.
Since it occurs in both LEDs, it must be a sort of common problem,
that is, for example, a change of +V in parent power supply 
(but it was monitored and doesn't seem to change),
or negative voltage jump (fail of regulator?), and so on.
Anyway I cannot pin down the cause of this jump, so far.

  Third plot indicates fluctuation of pedestals.  There seems to be
correlation with that of YAlOs.

  One hypothesis is that the fluctuation of YAlO output is caused
by the variation of ADC gate width.  YAlO has a long tail and 
the gate width (120ns) is shorter than the whole signal, and thus
its ADC value should be varied with the width, as a pedestal does.
As for negative correlation to HV, I think it is not real effect,
because when we intended to raise HV, there is positive correlation
between HV and YAlO output correctly.  One possibility is that
the instability of HV monitor pretended to be the change of HV.
It may occur by the variation of dividing resistor value, and
could depend on room temperature.  The gate width also could be
affected by temperature, and they seem to be correlated each other.

  Though we don't have a chance to prove it with the same setup,
we can test in similar situation at Kyoto.  (Of course, there
are many difference such as a optical grease, PMT, ADC, and
gate genetating module.)

  Actually it might be too optimistic because this scenario is
written on the basis that YAlO is potentially stable and 
all the problem exist except in YAlO.  But if this is the case,
we can get stable output by widening the gate to be 200ns or so.


---
  Tadashi Nomura, Department of Physics, Kyoto University
  Tel: +81-75-753-3852   Fax: +81-75-753-3795