IO boards in trigger crate
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02-May-01 (GR) Created

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IO board slot 21  (black on right unless otherwise noted)

Valid out  n/c

Output
  Note: top two pins are inactive
  ch 0     "trig clear CS0" --> CSC input
     1     trig clear CS0 to LA
     2-3   n/c
     4     "L2 TV scaler"
     5     "L2 ECL scaler"
     6-7   n/c
     8     "SFI Start CS0"
     9     "SFI Start to LA"
    10     Upload interrupt to RSTDC (VMEIO input)
    11     to upload latch in rack L7
    13     "Upload request to LA"
    14     "SSP Upload RQ"  (to CSC?)

Input 1
  ch 0     Upload from CSC

Valid in = SSP Start Out from CSC

Reset = "BOS"

Input 0
  ch 0-15  from ULM (L1.2)
    24-31  "STCF from fanout"


Note on  the outputs:
  According to the SSP code, the output bits are set as follows:
    Bits 0-7   trig clear
         8-11  SFI start
         12-15 upload request

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IO board slot 23