> sspcheck
                    SSP Diagnostic Control Routine, Version: 7.00
                               BBFC Interface                  
                            1-Jul-98 17:47:03              
 SSP "slot" number, in hex: [ 00000004         ] a        
 SSP "slot" number, in hex: [ a                ] 
 CHECK-I2-CSR0 contains: 0106F008 (ID is  0106)
 CHECK-I11-SSP has:  512 Kbytes of DM.
 Number of times to repeat each diagnostic: [         1 ] 
 Check all? (Y/N)  [ Y ] 
 Name of CPU diagnostics file: (diag.ssp is default) CHECK-I12-Diagnostics file name:
 /e787/local/online/fastbus/bnlssp/v700/diag.ssp                                 
 CHECK-I10-Check of SSP in slot (or route): 0000000A
 CHECK-I4-Writing addresses to DM and PM.

 SSPCMP-I0-No errors.
 CHECK-I5-Writing zeroes and ones to DM and PM.                       
 SSPCMP-I0-No errors.
 SSPCMP-I0-No errors.
 CHECK-I5-Writing zeroes and even ones to DM and PM.                  
 SSPCMP-I0-No errors.
 SSPCMP-I0-No errors.
 CHECK-I5-Writing zeroes and odd ones to DM and PM.                   
 SSPCMP-I0-No errors.
 SSPCMP-I0-No errors.
 Total BSI retries:         0  Total SSP NTA errors:         0
 The SSP system is: BNLBAS  , version: 5.10 .
 Lowest free DM location:  00000DB4  Lowest free PM location:  08D4 ( 235).
 Number of marker words in use:   637
 SSPFMT-I1-Markers were not loaded into DM.
 SSPCMP-I0-No errors.
 Load and store (L and ST) registers over zeroes test                            
 Load and store (L and ST) registers over ones test                              
 Store-multiple (STM) test                                                       
 Load-multiple (LM) test                                                         
 Subtract-register (SR) test                                                     
 Load address (LA) test                                                          
 Branch and link register (BALR) test                                            
 Load positive register (LPR) test                                               
 Load negative register (LNR) test                                               
 Load and test register (LTR) test                                               
 Load complement register (LCR) test                                             
 Branch and link (BAL) test                                                      
 Load PSW and branch on condition (LPSW and BC) test                             
 Subtract register and set CC bits test                                          
 And register (NR) test                                                          
 Compare logical register (CLR) test                                             
 Or register (OR) test                                                           
 Load register (LR) test                                                         
 Compare register (CR) test                                                      
 Add register (AR) test                                                          
 Multiply register (MR) test                                                     
 Divide register (DR) test                                                       
 Add logical register (ALR) test                                                 
 Subtract logical register (SLR) test                                            
 Compare Logical Immediate (CLI) test                                            
 Pipeline Register Contention (PRC) test                                         
 The SSP system is: BNLSYS  , version: 5.10 .
 Lowest free DM location:  0000051C  Lowest free PM location:  0B0C ( 2C3).
 Number of marker words in use:   164
 SSPCMP-I0-No errors.
 SSP Condition Code Bits check
 
Loops:       1 Errors: CC=E:       0 CC=L:       0 CC=H:       0 CC=O:       0  
 The SSP system is: BNLSYS  , version: 5.10 .
 Lowest free DM location:  00000570  Lowest free PM location:  0B5C ( 2D7).
 Number of marker words in use:   189
 SSPCMP-I0-No errors.
 CHECK-I6-Performing arbitration test on the cable segment.
 CHECK-I6-Performing arbitration test on the crate segment.
 CHECK-I13-Arbitration done, with:
   0 arbitration failures and   0 Fastbus errors on the cable
   0 arbitration failures and   0 Fastbus errors on the crate
 CHECK-I9-Done, with:     0 errors.